Digital IP Designer

 

Work Content:

Responsible for digital IP design and verification, implement architecture design, RTL development, participate in FPGA verification and system debugging, formulate IC test plan and support chip test work.

Location: Shenzhen & Shanghai

Job Requirements: 

Master Degree or Doctor Degree in Electrical and electronic engineering, at least 6 years of relative work experience, bachelor at least 8 years of work experience. Familiar with lint, CDC, synthesis, DFT insertion, timing analysis and scripting language VLSI design tools; Familiar with UNIX/Linux, strong learning ability and teamwork ability. SerDes, Ethernet and other related bus design experience is preferred.

Senior Validation Engineer

 

Work Content:

Develop hardware, software and tools required for new product testing, help design engineers evaluate, test and debug the new ICs application in audio system. Analyze customer return IC under multi-department cooperation.


Location: Shanghai & Shenzhen


Job Requirements:

Master degree in Electrical/Electronic engineering, computer engineering, more than 2 years’ experience related IC testing and verification for LDO, audio codec, MCU, or various high-speed analog interfaces, etc. Familiar with oscilloscope, power supply, source meter, spectrum analyzer, audio analyzer and other laboratory equipment. Familiar with python, C/C++ language and have relative development experience. Strong learning ability and teamwork. Serdes related test platform development experience is preferred.

Senior ATE Engineer

 

Work Content:

Design of innovative, reliable, and efficient Probe and Test solutions with highly parallel multi-site test capability using mixed signal/Digital ATE platforms (93K). Development of the ATE software solutions as per the specifications. Play a role in DFT/BIST definition & development, through direct involvement with the Design Team early in the New Product Development, to reduce FFC and improve testability. Execution of the Test development phases of the projects including Silicon functionality, Characterization, Yield Analysis, Correlation & Offshore Production release.

Location: Shanghai & Shenzhen
Job Requirements: 
Bachelor's or master's degree in electronic or electrical engineering, 3-5 years experience in mixed-signal or SoC testing; Familiar with software development based on 93K ATE platform, have good analytical and statistical ability, familiar with ATE multi-site hardware development, understand the problems and limitations in the hardware development process. Familiar with all kinds of laboratory equipment. Strong learning ability, team work. Serdes ATE development experience is preferred.

Careers

 

 

Reliability Engineering
Senior Application Engineer
Senior Account Manager
Analog Design Engineer

Salary and benefits include: monthly salary, post allowance, project award, year-end award, housing subsidy, five insurances and one fund, paid holidays, annual travel, holiday benefits, etc.
Resume delivery: Send your resume (attach two photos of your recent life) to the HR department mailbox: hr@t-semi.com

Hot Jobs

Other Jobs